EPT-2: RISC-V Processor Architecture

RISC-V is a free and open RISC instruction set architecture. This course will talk a lot about RISC-V instruction set from scratch, also including a section about why we even need a computer architecture and how real-time day-to-day apps run on a computer, with examples. The final aim of this course is to help everyone to build a robust specification, which is the very first criteria behind system design.

This course will walk you through the specifications, starting from signed/unsigned integer representation till RV64IMFD Instruction set with some images and examples. The conventions like “IMFD” will also be explored in a unique fashion, which is being never done before and any micro-processor or micro-controller related courses.